Corresponding to the above results, with the decrease of V SUB , the values of SSs show a decreasing trend and the minimum SS value of the device reaches 50 mV/dec at V DS = 50 mV and V SUB = − 35 V, which is far below the limit of 60 mV/dec for the conventional FETs and exhibiting the great advantage for ultra-low-power application.
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Improved Subthreshold Characteristics by Back-Gate Coupling on Ferroelectric ETSOI FETs.
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